AE ENGINEER · SEMICONDUCTOR ATE

Qihang Sun孙启航

Application Engineer · ACCO Test

I work at the intersection of semiconductor ATE, digital IC design, FPGA systems, and field engineering. I care not only about making systems work, but about making them testable, transferable, and dependable in delivery.

Connecting chip design, test platforms, and engineering reality.

My path began with Verilog RTL and FPGA systems, then expanded into semiconductor ATE applications, test-program migration, and hands-on validation. I approach complex systems by turning them into measurable, verifiable, and reproducible engineering steps.

ATE & Test Engineering

  • Test-program migration
  • Resource mapping
  • Debug & validation
  • Solution delivery

Digital Design

  • Verilog RTL
  • FSM & pipelining
  • CDC
  • AXI4-Lite

Systems & Tools

  • Zynq FPGA
  • ILA analysis
  • Python
  • Linux automation

Current role

2026 — Present

Application Engineer

ACCO Test

Supporting semiconductor automatic test equipment through test-program migration, resource adaptation, debugging, validation, and solution delivery—building a dependable bridge between devices, test platforms, and the field.

CURRENT

Selected work

From hardware links to research tools, these projects reflect how I approach cross-layer engineering problems.

01

High-speed pulse reception and data recovery

A Zynq-7020-based receiver for a high-speed digital link.

Designed direct-I/O sampling, frame parsing, clock recovery, two-stage synchronization, soft correlation, and board-level validation. The system recovered data at up to 40 Mbps with a 200 MHz main clock.

  • Verilog RTL
  • Zynq-7020
  • CDC
  • ILA
02

Xi'an livability and historical terrain map

An offline map that separates modern livability metrics from historical terrain context.

Combined terrain, roads, transit, parks, water, and public-facility data into an interactive screening tool, with explicit source attribution and clear methodological boundaries.

  • Python
  • GIS
  • OpenStreetMap
  • Static Web
03

A-share financial research toolchain

A long-horizon candidate screening, valuation, and evidence-management system.

Connects data cleaning, financial screening, FCF valuation, backtest auditing, and report generation, with safeguards against look-ahead bias and an emphasis on cash-flow quality and human due diligence.

  • Python
  • Data Pipeline
  • Valuation
  • Research
04

Mobile remote AI agent

A dependable asynchronous task channel between a phone and a desktop development environment.

Uses Syncthing, Tailscale, and system services for task submission, status checks, and result delivery. Its mailbox architecture keeps work recoverable through intermittent connectivity.

  • Python
  • Linux
  • Tailscale
  • Automation

Education and recognition

2023 — 2026

Xidian University

M.Eng. in Electronic Information

High-speed digital systems, modern digital signal processing, and digital integrated-circuit design.

2018 — 2022

Xi'an Technological University

B.Eng. in Electronic Information Engineering

Circuits, analog and digital electronics, communication principles, signals, and systems.

05 / CONTACT

Let's solve engineering problems worth the effort.

I welcome conversations about semiconductor test, digital systems, FPGA development, and engineering tools.